1. Technical Field
The present invention relates to a semiconductor package and a method for manufacturing the same, and more particularly, to a semiconductor package, which can be made lightweight, slim, and compact, and a method for manufacturing the same.
2. Description of the Related Art
In a conventional semiconductor package, a semiconductor chip is attached to a substrate. The semiconductor chip is electrically connected to the substrate through bonding wires. An insulator prevents the bonding wires and the semiconductor chip from contamination and moisture. The semiconductor package includes solder balls on a bottom surface of the substrate. The solder balls serve as input/output terminals for the semiconductor package.
FIG. 1 is a cross-sectional view of a conventional semiconductor package 10. Referring to FIG. 1, the semiconductor package 10 includes a semiconductor chip 13 attached to a printed circuit board (PCB) 11 through an adhesive 12. Pads 15 formed on the PCB 11 and pads 14 formed on the semiconductor chip 13 are mutually connected through bonding wires 16 to electrically connect the PCB 11 to the semiconductor chip 13. A plurality of solder balls 19 serving as external connection terminals are attached to the PCB 11. The semiconductor chip 13 is encapsulated by an insulator 18 to provide protection from the external environment.
As described above, typically, the PCB 11 is electrically connected to the semiconductor chip 13 through the bonding wires 16. When using a wire bonding technology, the highest point 16a of the bonding wires 16 must be spaced from a top surface 18a of the insulator 18 by a predetermined distance D1 in order to ensure the bonding wires 16 do not protrude from the insulator 18. The distance D1 has an effect on a total height H of the semiconductor package 10 and also the capability of stacking of multiple semiconductor packages 10. Hence, there are limitations in reducing the weight and dimensions of the semiconductor package 10.
In addition, lateral surfaces 13b of the semiconductor chip 13 must be spaced from lateral surfaces 18b of the insulator 18 by a predetermined distance D2, i.e., a distance necessary for connecting the semiconductor chip 13 to the PCB 11. The distance D2 has an effect on the width W of the semiconductor package 10. Hence, there is a further limitation in reducing the size of the semiconductor package 10.
As described above, the semiconductor package 10 has a limitation in reducing its height H and width W due to the bonding wire 16. Therefore, there is a limitation in realizing light weight, slimness, and compactness of the semiconductor package 10 while fabricating the semiconductor package 10. The present invention addresses these and other disadvantages of the conventional art.